Nano-Tec gold coated silicon wafers and silicon chips
Nano-Tec gold coated silicon wafers and silicon chips
Introduction
The Nano-Tec gold coated silicon wafers and chips are useful for thin film research, AFM / SPM, nanotechnology and biotechnology applications. The silicon wafers and chips are coated with 50nm of pure gold over a 5nm adhesion layer of Cr. Both Cr and Au are deposited in a dedicated high vacuum deposition system with electron beam evaporation sources. The gold coating is not atomically flat; there are height differences in the nm range. The maximum use temperature is around 175°C; higher temperatures could result in delamination of the gold film. Available in two silicon wafer sizes: Ø2”/51mm and Ø4”/100mm and Si chips 10 x 10mm. The Nano-Tec gold coated wafers are individually packed in wafer carrier trays for protection. The Nano-Tec gold coated Si chips are packed in A Gel-Pak box.
Specifications of the Nano-Tec gold coated silicon wafers and chips:
Coating film |
: 50nm gold, 99.999% purity |
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Adhesion film |
: 5nm Chromium, 99.98% purity |
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Surface roughness |
: several nm |
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Si substrate Orientation |
: <100> |
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Type |
: P (Boron) with one primary flat |
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Resisantance |
: 1-30 Ohm/cm |
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Product Number |
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Dimensions |
: Ø51mm |
Ø100mm |
10 x 10 mm |
Thickness |
: 275µm (+/- 20µm) |
525µm (+/- 20µm) |
525µm (+/- 20µm) |
TTV |
: =< 20µm |
=< 20µm |
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Primary Flat |
: 15.9 +/- 1.65mm |
32.5 +/- 2.5mm |
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Ordering information for Nano-Tec gold coated silicon wafers and chips
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